STLC2500C
General Description
The STLC2500C is a single chip ROM-based Bluetooth solution implemented in 0.13 um ultra low power, ultra low leakage CMOS technology for applications requiring up to HCI level. Patch RAM is available, enabling multiple patches/upgrades. The STLC2500C's main interfaces are UART or SPI for HCI transport, PCM for voice and GPIOs for control purposes.
Key Features
- BluetoothTM specification compliance: V2.0 + EDR
- Based on Ericsson Technology Licensing Baseband Core (EBC)
- Point-to-point, point-to-multipoint (up to 7 slaves) and scatternet capability
- Asynchronous Connection Oriented (ACL) logical transport link
- Synchronous Connection Oriented (SCO) link: 2 simultaneous SCO channels
- Supports Pitch-Period Error Concealment (PPEC)
- Improves speech quality in the vicinity of interference like e.g. WLAN
- Used with CVSD air coding
- Works at receiver, no Bluetooth implication
- Adaptive Frequency Hopping (AFH): hopping kernel, channel assessment as Master and as Slave
- Faster connection: interlaced scan for page and inquiry scan, first FHS without random back off, RSSI used to limit range
- Extended SCO (eSCO) links
- HW support for several packet types
- Clock support
- ARM7TDMI CPU
- Patch RAM capability
- Memory organization
- on chip RAM, including provision for patches
- on chip ROM, preloaded with SW up to HCI
- Communication interfaces
- Efficient and flexible support for WLAN coexistence in collocated scenario
- Software support
Connection Diagram
Applications
- Mobile tterminal platforms
