STLC2500A
General Description
The STLC2500A is a single chip ROM-based Bluetooth solution implemented in 0.13 um ultra low power, low leakage CMOS technology for applications requiring integration up to HCI level. Patch RAM is available enabling multiple patches/upgrades. The STLC2500A's main interfaces are UART for HCI transport, PCM for voice and GPIOs for control purposes.
Key Features
- BluetoothTM specification compliance: V1.1 and V1.2
- Ericsson Technology Licensing Baseband Core (EBC)
- Point-to-point, point-to-multipoint (up to 7 slaves) and scatternet capability
- Asynchronous Connection Oriented (SCO) link: 2 simultaneous SCO channels
- Support Pitch-Period Error Concealment (PPEC)
- Improves speech quality in the vicinity of interference like e.g. WLAN
- Used with CVSD air codinng
- Works at receiver, no Bluetooth implication
- Adaptive Frequency Hopping (AFH): hopping kernel, channel assessment as Master and as Slave
- Faster Connection: Interlaced scan for Page and Inquiry scan, first FHS without random back off, RSSI used to limit range
- Extended SCO (eSCO) links
- HW support for packet types:
- ACL: DM1, 3 5 and DH1, 3 , 5
- SCO: HV1, 3 and DV
- eSCO: EV3, 5
- Clock support
- ARM7TDMI CPU
- 31-bit Core
- AMBA (AHB-APB) bus configuration
- Patch RAM capability
- Memory organization
- On chip RAM, including provision for patches
- On chip ROM, preloaded with SW up to HCI
- Communication interfaces
- Efficient support for WLAN coexistence in collocated scenario
- Software support
Connection Diagram
Applications
- Mobile terminal platforms
